Ultra Low-Power Frequency Synthesizers for Duty Cycled IoT radios

Internet of Things (IoT), which is one of the main talking points in the electronics industry today, consists of a number of highly miniaturized sensors and actuators which sense the physical environment around us and communicate that information to a central information hub for further processing. This agglomeration of miniaturized sensors helps the system to be deployed in previously impossible arenas such as healthcare (Body Area Networks - BAN), industrial automation, real-time monitoring environmental parameters and so on; thereby greatly improving the quality of life. Since the IoT devices are usually untethered, their energy sources are limited (typically battery powered or energy scavenging) and hence have to consume very low power. Today's IoT systems employ radios that use communication protocols like Bluetooth Smart; which means that they communicate at data rates of a few hundred kb/s to a few Mb/s while consuming around a few mW of power. Even though the power dissipation of these radios have been decreasing steadily over the years, they seem to have reached a lower limit in the recent times. Hence, there is a need to explore other avenues to further reduce this dissipation so as to further improve the energy autonomy of the IoT node. Duty cycling has emerged as a promising alternative in this sense since it involves radios transmitting very short bursts of data at high rates and being asleep the rest of the time. In addition, high data rates proffer the added advantage of reducing network congestion which has become a major problem in IoT owing to the increase in the number of sensor nodes as well as the volume of data they send. But, as the average power (energy) dissipated decreases due to duty cycling, the energy overhead associated with the start-up phase of the radio becomes comparable with the former. Therefore, in order to take full advantage of duty cycling, the radio should be capable of being turned ON/OFF almost instantaneously. Furthermore, the radio of the future should also be able to support easy frequency hopping to improve the system efficiency from an interference point of view. In other words, in addition to high data rate capability, the next generation radios must also be highly agile and have a low energy overhead. All these factors viz. data rate, agility and overhead are mainly dependent on the radio's frequency synthesizer and therefore emphasis needs to be laid on developing new synthesizer architectures which are also amenable to technology scaling. This thesis deals with the evolution of one such all-digital frequency synthesizer; with each step dealing with one of the aforementioned issues. In order to reduce the energy overhead of the synthesizer, FBAR resonators (which are a class of MEMS resonators) are used as the frequency reference instead of a traditional quartz crystal. The FBAR resonators aid the design of fast-startup oscillators as opposed to the long latency associated with the start-up of the crystal oscillator. In addition, the frequency stability of the FBAR lends itself to open-loop architecture which can support very high data rates. Another advantage of the open-loop architecture is the frequency agility which aids easy channel switching for multi-hop architectures, as demonstrated in this thesis

Reducing Energy Dissipation in ULP Systems: PLL-Free FBAR-Based Fast Startup Transmitters

The energy dissipated by conventional phase-locked-loop-based transmitters (TXs) during the long startup phase is a major bottleneck that reduces the energy autonomy of duty-cycled ultra-low-power systems. In order to tackle this problem, this paper presents a loop-free TX based on a film-bulk acoustic wave resonator (FBAR) that has a 5-s startup time and requires just 3-s for channel switching. The presented TX takes advantage of the high-frequency stability of the FBAR digitally controlled oscillator (DCO) to operate in open loop mode. In order to avoid the problem of the same frequency stability that also hinders addressing multiple channels, the DCO output is mixed with a divided down version (which gives the IF) of itself. By adjusting the division ratio suitably, frequency of the system can then be tuned. To further relax the tuning requirements on the FBAR, the divider for producing the IF is implemented as a phase-switching divider with a step size of 0.2. Integrated in a 65-nm technology node, the TX can address all the bands within the 2.36-2.5-GHz frequency range viz. Medical body area network, industrial, scientific, and medical, and low-power active medical implant bands. Moreover, this TX is able to reach up to 16-Mb/s peak data rate while consuming 9.2 mA at 1.2 V

A 51.4 Mb/s FSK Transmitter Employing a Phase Domain Digital Synthesizer with 1.5 mu s Start-up for Energy Efficient Duty Cycling

This paper presents a low start-up latency Transmitter (TX) that can achieve FSK data rates of upto 51.4 Mb/s for deployment in duty cycled microsensor nodes. Utilizing a Phase Domain Digital Synthesizer with an FBAR frequency reference, this TX has a start-up latency of just 1.5 mu s. It has been integrated in a 65nm technology and outputs upto 3 dBm power. It achieves a phase noise of -110 dBc/Hz at 1 MHz offset and has a frequency coverage of 2.17 - 2.47 GHz. The power consumption of this TX (including the Digital Baseband) varies from 15 mW at 1.2 Mb/s to 21.4 mW at 51.4 Mb/s. At peak data rate, this leads to an Duty-Cycling-Energy/bit (which takes into account the start-up energy) of 500 pJ/b for transmitting packets of length 32 bytes. Moreover, the TX incorporates a Hybrid Requantizer circuit which helps to trade off in-band noise with the spurs due to the non-linearity induced Sigma Delta noise folding

A 2.4-GHz low complexity polar transmitter using dynamic biasing for IEEE 802.15.6

A 2.4 GHz polar transmitter compliant with the IEEE 802.15.6 standard is presented in this paper. A Linearized class-C power amplifier, employing dynamic biasing is used to minimize the adjacent channel interference and satisfy the defined spectrum mask requirements. An FBAR based frequency synthesizer enables fast startup and channel switching times. It is capable of addressing all the channels within the MBAN and ISM bands (2.36-2.48 GHz). The transmitter was integrated in 65 nm CMOS technology. It provides 0 dBm of output power while drawing 8.7 mA of current from a 1.2 V supply. The standalone power amplifier exhibits peak efficiency of 16%. © 2015 IEEE